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1588Tiny Micro IP Cores
IEEE1588v2 No CPU slave clock.
1588 Tiny is an IEEE1588-2008 V2 slave-only hard-compatible clock synchronization IP core for Xilinx FPGAs. It is focused on devices that require basic IEEE 1588 functionality with minimal resources. 1588 Tiny accurately timestamps IEEE 1588 messages and provides synchronized clocks using only hardware modules.
There is no need for an embedded processor and no need for a generic Ethernet MAC. 1588 Tiny includes an optimized Ethernet MAC that can handle PTP frames. It supports power profiles and IEC 61850, and can also support other profiles.
The following Xilinx FPGA families support 1588 Tiny:
- 7-Series (Zynq, Spartan, Artix, Kintex, Virtex)
- Ultrascale (Kintex, Virtex)
- Ultrascale+ (Zynq MPSoC, Kintex, Virtex)
- Versal ACAP
1588Tiny IP Core for Xilinx Vivado Tools
Integration into your FPGA designs is made easy by utilizing the new Xilinx Vivado tool, which allows IP cores to be used in a graphical user interface and IP parameters to be configured in an easy way.
1588 Tiny Key Features
general
- For Vivado (IP integrator)
- Supports single-port and dual-port (Ethernet interface can be used for other purposes) modes
connector
- MII/RMII/GMII/RGMII/SGMII/QSGMII/USXGMII Physical Layer Device (PHY) Interface
- Supports AXI-Stream interface
- Supports 10/100/1000Mbps speeds
Arbitrary Run Timer Function
- Fully managed by the user (time and frequency adjustment)
Time Synchronization
- Layer 2 PTP support (single and dual port)
- Supports Layer 3 PTP (single port)
- Supported profiles: power supply profiles, utility profiles, IEC61850 profiles and default profiles
- Available output timers: "64-bit nanoseconds" or "48-bit seconds + 32-bit nanoseconds".
- Provide PPS output
- Optional IRIG-B master output synchronized with PTP internal timer (DCLS and AM modulation)
- Event timestamp support
- Support alarm detection
Reference Design Supported Boards
- SoC-e SMARTzynq brick (recommended)
For more information, please contact us at info@aiportek.com
Keeping up with the times and innovating - Explore more potentials of TSN with Hongke
Time Sensitive Networking (TSN) is a new generation of network technology based on the evolution of the standard Ethernet architecture. It takes traditional Ethernet as the network foundation and provides a data link layer protocol specification for deterministic data transmission capability through mechanisms such as clock synchronization, data scheduling, and network configuration. Compared with traditional Ethernet, TSN can provide microsecond-level deterministic services, reduce the complexity of the entire communication network, and realize the convergence of information technology (IT) and operation technology (OT). With its precise clock synchronization, deterministic traffic scheduling, and intelligent and open operation and maintenance management framework, TSN can ensure the high-quality transmission of multiple business traffic in a common network, and it has both performance and cost advantages, and it is the development trend of the future network. This is the future trend of network development.
Currently, TSN technology has a high level of discussion in the automotive, industrial, rail transportation, and aerospace fields. As a non-vendor-bound real-time communication protocol, we believe that TSN technology has a good application prospect.
Welcome to contact us to explore and learn the integration of TSN technology with various industries, and actively promote more applications on the ground to jointly build a new world of intelligent interconnection.
