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Precision Time Base IP Cores
IEEE1588v2 Common and Boundary Clocks
Precision Time Foundation is an IEEE1588-2008 v2 compatible clock synchronization IP core for Xilinx FPGAs. It accurately timestamps IEEE 1588 messages and provides a compatible timer. All these processes are performed by hardware modules.
Precision Time Base IP contains different hardware and software elements:
- Hardware Timestamping Units (TSUs) accurately timestamp IEEE 1588 event messages and provide adjustable timers with sub-microsecond accuracy. In practice, Precision Time Base offers two versions of the TSU: the PTB TSU and the PTBLite TSU.
- The PTB TSU is designed to be connected to a medium independent interface ([G] MII) between the MAC and the PHY, parsing all Ethernet frames and checking which are IEEE 1588.
- The PTBLite TSU utilizes the PTP parser included in the Zynq GMAC to provide a TSU using less FPGA resources, but the IEEE 1588 hardwire logic on the PS GMAC imposes some limitations.
Both versions of the TSU can use the internal adjustable timer or get its timer value from another TSU. Thus, multiple Ethernet connections can share the same timer or different Ethernet connections can have their own timers.
- The PTB TSU is designed to be connected to a medium independent interface ([G] MII) between the MAC and the PHY, parsing all Ethernet frames and checking which are IEEE 1588.
- The PTBLite TSU utilizes the PTP parser included in the Zynq GMAC to provide a TSU using less FPGA resources, but the IEEE 1588 hardwire logic on the PS GMAC imposes some limitations.
The final accuracy obtained in an IEEE 1588 system depends on a number of factors (frequency and quality of the local clock, location of timestamps in the data chain, etc.). As a reference, the figure above shows the measurement error between the PPS generated by a commercial Grandmaster device and the PPS generated by the Zedboard Avnet Devopment Platfrom, which runs the LinuxPTP software stack in an ARM processor and Hardware-assisted time stamping (+/-50 ns) using Precision Time Base.
Hardware Features
- Supports 10/100/1000Mbps/AXI-Stream (for 10Gbps/25Gbps) Interface
- 32-bit Seconds/32-bit Nanoseconds Counter
- 32-bit sub-nanosecond frequency adjustment
- One pulse per second output
- Selectable frequency output (1 KHz/2 KHz/4 KHz/8 KHz/16 KHz/32 KHz)
- Lowest FPGA resource utilization
- Alarm Generation
- Event Timestamp
Software Features
- General Clock (Master and Slave) Operation
- End-to-end and point-to-point delay mechanism support
- PTP is supported on both Layer 2 (Ethernet) and Layer 3 (IPv4) interfaces
- It can be used in conjunction with HSR-PRP and managed Ethernet IP cores.
- VLAN Support
- Industrial Profiles: Default, Power, Power Utilities IEC 61850-9-3, IEEE 802.1AS
- Car Profile: IEEE 802.1AS Generic PTP (gPTP) Profile
- Enterprise Profiles/5G/Telecom Profiles: G.8265.1, G.8275.1 and G.8275.2
Xilinx FPGA family support
The following Xilinx FPGA families can support Precision Time Basis:
- 7-Series (Zynq SoC, Spartan, Artix, Kintex, Virtex)
- Ultrascale (Kintex, Virtex)
- Ultrascale+ (Zynq MPSoC, Kintex, Virtex)
- Versal ACAP
Integration into your FPGA designs is made easy by utilizing the new Xilinx Vivado tool, which allows IP cores to be used in a graphical user interface and IP parameters to be configured in an easy way.
Reference Design Supported Boards
SoC-e SMARTzynq brick (recommended)
Keeping up with the times and innovating - Explore more potentials of TSN with Hongke
Time Sensitive Networking (TSN) is a new generation of network technology based on the evolution of the standard Ethernet architecture. It takes traditional Ethernet as the network foundation and provides a data link layer protocol specification for deterministic data transmission capability through mechanisms such as clock synchronization, data scheduling, and network configuration. Compared with traditional Ethernet, TSN can provide microsecond-level deterministic services, reduce the complexity of the entire communication network, and realize the convergence of information technology (IT) and operation technology (OT). With its precise clock synchronization, deterministic traffic scheduling, and intelligent and open operation and maintenance management framework, TSN can ensure the high-quality transmission of multiple business traffic in a common network, and it has both performance and cost advantages, and it is the development trend of the future network. This is the future trend of network development.
Currently, TSN technology has a high level of discussion in the automotive, industrial, rail transportation, and aerospace fields. As a non-vendor-bound real-time communication protocol, we believe that TSN technology has a good application prospect.
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